Computer Architecture Assignment

Design the arithmetic shift unit that perform the following operations.

stage i of the arithmetic logic shift unit

Design a 3-bit bus system that have six registers using three state buffers and decoder.

What is wrong with the following register transfer statements?
1. XT:AR←AR,AR←0 Cannot complement and clear the same register at the same time.
2. YT:R1←R2,R1←R3 Cannot transfer two different values (R2 and R3) to the same register (R1) at the same time.
3. ZT:PC←AR,PC←PC+1 Cannot transfer a new value into a register (PC) and increment the original value at the same time.

The operations to be performed with a flip-flop F (not used in the basic computer) are specified by the following register transfer statements:

xT3:F←1

yT1:F←0

zT2:F←F

wT5:F←G

Otherwise, the content of F must not change. Draw the logic diagram showing the connections of the gates that form the control functions and the inputs of flip-flop F. Use a JK flip-flop and minimize the number of gates.

The content of memory is shown in the following table, Execute the next four instructions Starting with PC=021 and AC=1234, E=0. Show values of PC, AC, AR and IR for every instruction.

Address	Content
21	D100
22	7010 `SPA`
23	7001 `HLT`
⋮
100	0200
⋮
200	Hex 0
201	7080 `CIR`
202	C200

	PC	AC	AR	IR	M[200]
initial	021	1234			0
021	022 201	1234	021 200 201	D100 `BSA 100 I`	022
201	202	091A	201	7080 `CIR`	022
202	203 022	091A	202 022	C200 `BUN 200 I`	022
022	023 024	091A	022	7010 `SPA`	022

Derive the control gates associated with the program TR register in the basic computer.

An output program resides in memory starting from address 2300. It is executed after the computer recognizes an interrupt when FGO becomes a 1 (while lEN = 1).
1. What instruction must be placed at address 1? BUN 2300
2. What must be the last two instructions of the output program? ION and BUN 0 I